In the art of recording, it is often desirable to use binary coded signals. This can present problems with recorders which have no DC response such as a video tape recorder using a rotating transformer to record signals and a magnetic tape moving adjacent thereto. It is customary to record using high frequency square waves and representing the binary numbers with wave shapes of different configurations. For example, a digital 10 is commonly represented by the four bit configuration 1010 and a digital two by 0010. Using high frequency square waves, these might be represented by: ##STR1## which would be transmitted through the rotating transformer and deposited as a series of magnetic positive and negative areas with, e.g., north being represented by a positive or "1" and south represented by a negative or "0". For convenience herein, the far left hand bit of a digital word or pattern will be referred to as the start, first, or beginning bit of the word or pattern and the far right hand bit will be referred to as the last or ending bit, and when there is a word or pattern on either side of the word or pattern under consideration, the right hand word will be referred to as the next word or pattern while the left hand word will be referred to as the previous word or pattern.
There are several problems associated with recording binary signals, a major one of which is referred to as base line shift. This occurs when a series of binary signals is transmitted which have, on the average, a greater number of positive or a greater number of negative bits. For example, a fourteen is 1110, a thirteen is a 1101, an eleven is 1011 and a seven is 0111. Each of these has a positive weighting factor of +2 since there are two more "1"'s than there are "0"'s. Thus, when a number of these are transmitted, the net increase in the positive signal would cause the base line to rise. Similarly, the number one is represented by 0001, two by 0010, four by 0100, and eight by 1000, all of which have a weighting factor of -2 and would cause the base line to drop. Furthermore, the number zero (0000) has a -4 weighting factor and fifteen (1111) has a +4 weighting factor. A series of these two numbers not only causes base line movement, but also conveys very little information to the clock regeneration circuit since there are no transitions from "0" to "1" or from "1" to "0" for that circuit to observe. Another problem is that an error in one bit will go unobserved because changing a "1" to a "0" or vice versa in any word results in another recognizable and valid word. For example, 1010 intended to represent ten but actually transmitted as 1110 would be read as a fourteen.
There have been suggestions in the prior art that some of these problems could be diminished if there were a greater number of code patterns to chose from. For example, a code identified as the "8-10" code has been used to increase the number of choices from 2.sup.8 =256 to 2.sup.10 =1024. Thus, out of the 1024 different patterns, 256 of them are selected to represent the desired 256 different combinations. By proper selection, the patterns will have little or no net D.C. content, that is the number of "1"'s and "0"'s will be the same, thus avoiding base line shift. The problem presented by the "8-10" code is that the transmission and reproduction apparatus must now be designed to accept a higher frequency, i.e., ten bits where there used to be eight.
Another code which has been proposed is referred to as the "8-16" code which greatly increases the number of patterns available and manages to do so without having to increase the frequency response of the equipment. Furthermore, there are enough choices available that it is possible to get 256 zero weight patterns that also leave at least 2 bits between any two successive transitions from "0" to "1" or from "1" to "0". Thus, since any transmission is composed entirely of 2 bit or greater pieces, the frequency is effectively half of a normal 16 bit transmission and accordingly, the electronics for an 8 bit system will not have to be changed.
Of course, 8, 10 and 16 bit systems require far more electronics memory and expense than the smaller 4 bit systems but any attempt to map a 4 bit system into a higher 6 or 8 bit system has been met with difficulty. For example, when an 8 bit system is used, there are just 256 patterns to choose from. Of these, only six can have both a zero D.C. component and 2 bit widths between transitions so as to avoid having to increase the frequency capability. These six are: 00001111, 00110011, 00111100, 11000011, 11001100 and 11110000. All other combinations either have more "0"'s than "1"'s or more "1"'s than "0"'s or involve a transition from one state ("0" or "1") to the other state ("1" or 37 0") after only 1 bit. For example, 11111100 and 00011000 each use at least 2 bits between transitions but the number of "1"'s is not equal to the number of "0"'s and base line shift could occur. Likewise, 10101100 and 01110010 have the same number of "1"'s and "0"'s, but have transitions only 1 bit wide and frequency doubling occurs.
The present invention overcomes these two problems and provides a 4 bit system that does not have base line shift, does not have frequency doubling, can detect all 1 bit errors in a recorded signal, is highly self synchronizing and provides frequent information for the clock regeneration circuit.